Chip Design System Test

SOC test design and its optimization is the topic of this book. It gives an introduction to testing, describes the problems related to SOC testing, discusses the modeling granularity and the implementation into EDA (electronic design automation) tools. The book is divided into three sections: i) test concepts, ii) SOC design for test, and iii) SOC test applications. The first part covers an introduction into test problems including faults, fault types, design-flow, design-for-test techniques such as scan-testing and Boundary Scan. The second part of the book discusses SOC related problems such as system modeling, test conflicts, power consumption, test access mechanism design, test scheduling and defect-oriented scheduling. Finally, the third part focuses on SOC applications, such as integrated test scheduling and TAM design, defect-oriented scheduling, and integrating test design with the core selection process.

The first practical DFT guide from an industry insider. Skip the high-brow theories and mathematical formulas--get down to the business of digital design and testing as it's done in the real world. Learn practical testing strategies that address today's business needs for quality, reliability, and cost control, working within the tight deadlines of typical high-pressure production environments. Design-for-Test for Digital IC's and Embedded Core Systems helps you optimize the engineering trade-offs between such resources as silicon area, operating frequency, and power consumption, while balancing the corporate concerns of cost-of-test, time-to-market, and time-to-volume. You'll also boost your efficiency with the special focus on automatic test pattern generation (ATPG). The book includes a roadmap that allows you to fine-tune your learning if you want to skip directly to a specific subject. Key topics include: Core-based design, focusing on embedded cores and embedded memories System-on-a-chip and ultra-large scale integrated design issues AC scan, at-speed scan, and embedded DFT Built-in self-test, including memory BIST, logic BIST, and scan BIST Virtual test sockets and testing in isolation Design for reuse, including reuse vectors and cores Test issues being addressed by VSIA and the IEEE P1500 Standard Design-for-Test for Digital IC's and Embedded Core Systems is filled with full-page graphics taken directly from the author's teaching materials. Every section is illustrated with flow-charts, engineering diagrams, and conceptual summaries to make learning and reference fast and easy. This book is a must for the engineers and managers involved in design and testing. The enclosed CD-ROM contains full-color versions of all the book's illustrations in Acrobat PDF format. These images may be viewed interactively on screen or printed out to create overheads for teaching. Acrobat Reader software for Windows and UNIX computers is included.

System-on-a-chip - System-on-a-chip (SoC or SOC) is an idea of integrating all components of a computer system into a single chip. It may contain digital, analog, mixed-signal, and often radio-frequency functions – all on one chip.

Advanced Design System - Advanced Design System (ADS) is an electronic design automation software system produced by EESof, a unit of Agilent Technologies. It provides an integrated design environment to designers of RF electronic products such as mobile phones, pagers, wireless networks, satellite communications, and radar systems.

Design For Test - Design for Test (aka "Design for Testability" or "DFT") is a name for design techniques that add certain testability features to a microelectronic hardware product design. The premise of the added features is that they make it easier to develop and apply manufacturing tests for the designed hardware.

Reliable system design - Reliable system design is the design of systems with high levels of reliability and availability.

chipdesignsystemtest

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